1. Technical Field
The present disclosure relates to the field of transistor designs. The present disclosure relates more particularly to the field of vertical slit transistors formed in an integrated circuit die.
2. Description of the Related Art
The transistor is a fundamental component of semiconductor integrated circuits. A single integrated circuit die can include billions of transistors. In order to decrease the cost, integrated circuit technology is continually scaling downward. In particular, the dimensions of the transistors are decreased in order to fit more transistors in a given area of a semiconductor substrate.
Conventional transistors typically include a source, drain, and channel region formed in a semiconductor substrate. A thin gate dielectric is positioned over the channel region. A gate electrode is positioned on top of the gate dielectric. Such conventional transistors have been the primary transistors in CMOS devices for decades.
In addition to such conventional transistors, other transistor designs have been devised. Such transistor designs include FinFET transistors, carbon nanotube transistors, and vertical slit transistors. These alternative transistor designs have been devised in order to further increase the number of transistors that can be placed in a given area of a semiconductor or other substrate.
An example of a known vertical slit transistor is disclosed in FIG. 1. In particular, FIG. 1 is a top view of an integrated circuit die 18 including a vertical slit transistor 20. The vertical slit transistor 20 includes a source region 22, a drain region 24, and a channel region 29 each positioned in a semiconductor substrate 21. The vertical slit transistor 20 further includes a first gate electrode 26a and a second gate electrode 26b positioned in a recess in the semiconductor substrate 21. The first gate dielectric 28a is positioned between the gate electrode 26a and the source 22, the drain 24, and the channel region 29. The second gate dielectric 28b is positioned between the second gate electrode 26b and the source 22, the drain 24, and the channel region 29. The top surfaces of the semiconductor substrate 21, the gate electrode 26a, the gate electrode 26b, and the gate dielectrics 28a, 28b are planar. The dashed circle 23 denotes an area in which a source contact contacts the source region 22. The dashed region 25 denotes an area at which a drain contact contacts the drain region 24. The dashed circles 27a, 27b denote respective gate contact regions for the gate electrodes 26a, 26b. 
The semiconductor substrate 21 is, for example, monocrystalline silicon. The gate electrodes 26a, 26b are, for example, polysilicon or metal. The gate dielectrics 28a, 28b are a high K dielectric material such as hafnium oxide. The gate dielectrics 28a, 28b are, for example, 2-10 nm thick.
The vertical slit transistor 20 can act as a switch much like a conventional CMOS transistor. When the transistor 20 is turned on, a drain current flows from the drain 24 to the source 22. When the transistor is turned off, substantially no current flows from the drain 24 to the source 22. The transistor 20 can be either an N-channel device or P-channel device. In an example in which the transistor 20 is an N-channel device, the source region 22 and the drain region 24 are doped with N-type donor atoms. When a positive voltage is applied between the drain 24 and the source 22, the transistor can be turned on by applying a positive voltage to the gate electrodes 26a, 26b with respect to the source 22. The transistor 20 can be turned off by applying a low voltage to the gate electrodes 26a, 26b. The presence of two gates 26a, 26b adjacent to the channel region 29 allows for very rapid and strong inversion of the channel region 29, giving the transistor 20 a relatively large drain current when the transistor 20 is turned on. Likewise, the presence of two gate electrodes 26a, 26b adjacent to the channel region 29 allows for the transistor 20 to effectively stop any current from flowing between the drain 24 and the source 22.
However, the vertical slit transistor 20 also suffers from some drawbacks. For example, the vertical slit transistor 20 has relatively high capacitances between the gate electrodes 26a, 26b and the source and drain regions 22, 24. This is problematic because as the gate-to-source and gate-to-drain capacitances of a transistor increase, the switching time of the transistor also increases. This means that it takes longer for the transistor to transition from an on state to an off state or from an off state to an on state. Thus, the maximum frequency at which a transistor can switch between on and off states decreases as the gate-to-source and gate-to-drain capacitances increase.
As shown in FIG. 1, there are four capacitors that may exist for each vertical slit transistor, Cgs1, Cgs2, Cgd1, and Cgd2. The value of a capacitor is set forth in the known equation for capacitors:
      C    =          k      ⁢              A        d              ,where k is a factor that includes the dielectric constant, A is area, and d is the distance between the plates, which in this case are the gate and either the source or drain, respectively, Cgs being a gate-to-source capacitor and Cgd being a gate-to-drain capacitor. The prior art has a relatively short distance which will increase the value of the capacitors. Higher capacitor values tend to slow down transistor operation.